The signals generated by the modern digital signal processor (DSP) have become increasingly complex and difficult to analyze. For proper development and testing of the sophisticated algorithms processing these signals, the DSP or the system using the DSP should be analyzed in real-time operation. In many cases, it would be desirable to analyze the intermediate signals represented by digital samples that are normally found only within the DSP or DSP system. The term "DSP" will hereinafter be understood to include both a digital signal processor under development or test as well as a system under development or test that performs digital signal processing.
Some logic analyzers and DSP development systems allow some analysis of such signals, but this analysis is limited in real-time performance and flexibility. Some logic analyzers, for example, may produce plots of the amplitude levels represented by a series of digital samples produced within a DSP, but the plot merely gives a graphical display of the signal. The signals produced by many algorithms are often difficult to interpret with a simple waveform plot. In other DSP diagnostic systems, a selected group of digital samples may be plotted graphically on a host computer. No real-time signals are produced in such systems, and the flexibility of this kind of analysis is limited to the functions available in the software.
The Applicants have perceived that greatly improved analysis of the algorithms used in modern signal processing could be obtained if truly real-time signals could be reconstructed that are suitable for specialized test equipment, including the oscilloscope, spectrum analyzer, modulation analyzer, as well as devices that interface to the signal processing system under development or test. In many cases, the human ear is also a useful analysis tool for signal processing. None of this equipment, including the ear, is suitable for analyzing signals that only exist within the DSP because an actual signal is required rather than just a collection of numbers. The relationship of amplitude level and time is critical to the analysis performed by this equipment; mere numbers representing samples mean nothing to it.
Diagnostic systems for reconstructing digital samples from a DSP into analog signals are known that depend on prior knowledge of the sample timing. Such systems are not suitable for reconstructing signals from points within a system where the sample timing is not known. In many cases, it is not possible or convenient to provide such prior knowledge to a diagnostic system.
Such known diagnostic systems are also unsuitable for reconstructing digital samples that are processed at varying intervals. Such processing is becoming more commonplace as DSPs begin to use more complex software structures having multiple threads of microprocessor execution. The servicing of interrupts and high-level coding of the signal processing functions often causes the processing of the digital samples to lose any real-time relationship to the actual signal they represent. Another problem is that some signal processing algorithms, such as the square root function, can take a varying amount of time to execute, and this execution time can depend on the input signal. The digital samples representing the results of such algorithms would be reconstructed at varying times, resulting in an analog signal with jitter that may be dependent on the signal itself. This jitter would be compounded if the result were derived from several time-varying algorithms.
The signal reconstruction of known diagnostic systems encounters even more difficulty with burst-mode samples. Digital signal processing is often performed on bursts of signals in the interest of efficiency. In addition, many signals are time-division multiplexed such as in the GSM cellular telephone standard. Algorithms processing such burst-mode signals produce several samples within a relatively narrow time interval. In order to reconstruct the results of this processing, several samples must often be extracted in a burst in which the interval between samples is no more than a few DSP clock cycles. The interval between these bursts will typically be much longer, and the resulting variation in sample intervals causes the digital samples to lose their real-time relationship to the signal they represent.
The Applicants have found that sample timing is a fundamental problem with the reconstruction of digital signals from a DSP. The digital samples appear at intervals which are not known and which vary widely from one sample to the next. Analog samples must be produced at relatively constant intervals for accurate reconstruction. The true rate at which the digital samples are produced must be preserved, so that the analog signal accurately reconstructs the real-time signal, which the digital samples represent.
The Applicants have discovered that a solution to this problem is to buffer the samples from the DSP and generate buffered samples at the same mean rate but at relatively constant intervals. Sample buffering systems are known to those skilled in the communications art. U.S. Pat. No. 3,754,098, for example, contains a disclosure of a communications system using sample buffering. At the receiving end of a digital communications link, samples intended for the receiving station are extracted from the communications link and sent to a sample buffering system that uses a buffer memory and an analog control loop. The number of samples stored in the buffer memory is converted to an analog error signal, filtered, and applied to an analog voltage controlled oscillator (VCO). The digital samples are clocked out of the buffer memory at a rate determined by the VCO. They are then converted to analog voltage levels with a D/A converter. The extraction is tied directly to the encoding of the original analog signal into the digital samples that are to be extracted.
As has already been mentioned above, the digital samples produced by modern signal processing quickly lose their real-time relationship to the original analog signal or signals from which they were derived. Such samples cannot be extracted from a DSP based simply on the timing of the sampling of the original analog signal or signals. Rather, the Applicants have found that the extraction of such samples should be triggered by the context of the operations of the DSP that produces them. Such a triggering event might be the execution of a special test instruction, the assertion of a particular address or range of addresses on the address bus of the DSP, or the assertion of an I/O pin by the DSP.
Sample buffering systems are also known in the communications art that use digital circuitry for the control loop. Such systems are intended for the narrowband frequency range required of a communications application. One known system, for example, uses a buffer memory and an unfiltered digital control loop to set the output sample rate according to the difference between input and output addresses. The frequency characteristics of a digital loop filter would be degraded by the jittering transferred from the input signal to the loop filter update rate. No loop filter is used, perhaps because the control loop is updated at a rate determined by the input samples. The unfiltered control loop will respond to aliases of frequencies beyond the limited range utilized in a communication system. Thus this known system is suitable for a narrow range of frequencies.